Training
April 22-23, 2009
May 20-21, 2009
June 17-18, 2009
July 22-23, 2009
September 16-17, 2009
October 21-22,
2009
December 2-3, 2009
Please click on the training date to register.
The LV2005 Class provides an introduction to LogicVision technology and automation tools, building upon a recommended flow that a hardware engineer adding Built-In Self-Test ("BIST") should follow. The lecture/lab format of the class gives students a conceptual understanding of how BIST circuitry for random logic and memories can be automatically generated and inserted into a circuit. Using the LogicVision toolset, the student will gain practical experience in a "hands-on" lab environment. While no prior exposure with the LogicVision tools is assumed, all attendees are expected to have experience with at least one high-level design language (Verilog or VHDL) as well as design synthesis experience in the UNIX environment. Knowledge of boundary scan and internal scan techniques is recommended. More Details
Location
LogicVision Corporate Headquarters
25 Metro Drive, Third Floor
San Jose, CA 95110
Map and Hotel Info
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