Solutions Overview
LogicVision's Eyes in the Die Enable Yield Learning
The main challenges facing any semiconductor manufacturer today revolve around achieving the highest yield in the shortest amount of time. This is especially true as the industry moves to 90nm process geometries and beyond. LogicVision’s products and solutions enable customers to improve their product quality, gain information on the source of product failures and field returns, and use that information to create higher yielding ICs faster.
As the industry moves to 90 nm and below,
it is fast becoming apparent that simple stuck-at fault based testing can no longer provide adequate product quality. Both at-speed and multiple detect-based testing are needed. At-speed testing is required to detect delay defects, such as AC coupling, resistive vias & shorts/opens, and slow gates. Multiple detect testing is required to detect defects such as bridging defects, transition faults, and shorts to adjacent wires.
So how does LogicVision enable yield learning? By putting "eyes in the die." LogicVision embeds test and diagnostic circuits deep inside the IC. This allows for reporting from the inside out, providing unprecedented visibility into that IC from silicon debug, through production, all the way through to the end user. Designers, test engineers, fabricators, and systems manufacturers, even the end user, can see what’s going on inside that circuit at any point in time through our "eyes" in the die.
Silicon Test
LogicVision’s complete and integrated yield learning solution is ideal for today’s complex SoC designs. Designers use LogicVision’s silicon test solution, the ETCreate™ family of design automation tools, to create and integrate the "eyes" (embedded test controllers) into a design. Controllers can be created for at-speed testing of logic, memories, I/O, and mixed-signal components. These design automation tools are also used to create a LogicVision database (LVDB™). This database contains extensive information about the embedded test controllers including such things as access protocols, execution options, and test result signatures.
Silicon Debug
The LVDB is used by LogicVision's real-time silicon debug solutions, the Silicon Insight™ family of products. The Silicon Insight software interfaces to popular test-platform or a customer performance board to control and interpret results from the embedded test controllers within the device under test. This integrated solution provides a fully automated and powerful environment for at-speed debugging of silicon. This solution eliminates dependence on test vectors, test programs, expensive test equipment, and raw ATE failure data. The automated flow provides a fully symbolic debug environment and provides explicit, real-time failure information such as memory bit location of logic net name. The solution can greatly increase productivity for chip designers and test engineers during the critical phase of silicon validation and debug, speeding time-to-market yield.
Once in manufacturing, the same accurate diagnostic and analytic capabilities provided for silicon debug then enable you to ramp to volume yield more quickly. At-speed debug allows you to isolate the root cause of failures which means you achieve yield learning and thus yield process improvement.
Silicon Analysis
For silicon analysis, LogicVision's Yield Insight systematic yield learning solution leverages detailed manufacturing test data, available from LogicVision's embedded test products, to provide detailed sub-die level failure and performance monitoring capabilities to help accelerate yield ramps and improve overall yields. Yield Insight offers a structured and highly effective yield learning platform that can be used during the entire semiconductor manufacturing and test cycle, starting from silicon bring-up and characterization, and extending into the yield ramp and volume manufacturing stages. This analysis feeds back to design and manufacturing to allow learning to improve future yields.